ZPUino Hyperion Variant

Named after the Greek Titan known as the "Lord of Light", Hyperion variants all implement the Half Quarter VGA peripheral.

Supported Hardware

 Papilio BoardZAP IDE Board TypeBit FileSource Code
Arcade MegaWingPapilio One 500KZPUino on Papilio One (500) board, Hyperion with 8-bit HQVGA on Arcade MegaWingDownloadSource Code
LogicStart MegaWingPapilio One 500KZPUino on Papilio One (500) board, Hyperion with 8-bit HQVGA on LogicStart MegaWingDownloadSource Code
Any Board - Pin SelectPapilio One 500KZPUino on Papilio One (500) board, Hyperion with 8-bit HQVGA, Pin SelectDownloadSource Code
Arcade MegaWingPapilio Pro LX9ZPUino on Papilio Pro (LX9), Hyperion with 8-bit HQVGA on Arcade MegaWingDownloadSource Code
LogicStart MegaWingPapilio Pro LX9ZPUino on Papilio Pro (LX9), Hyperion with 8-bit HQVGA on LogicStart MegaWingDownloadSource Code


Peripheral Wishbone Slot Location

NameWingSlotNotes
ZPUino_SPI0 
ZPUino_UART1 
zpuino_gpio2 
zpuino_timers3 
zpuino_sigmadelta5 
zpuino_spi6 
zpuino_crc167 
zpuino_vga9Hardwired to LogicStart and Arcade pins. Connected to PPS for Pin Select
wb_char_ram_8x8_sp10Character ROM for VGA core
zpuino_io_YM214911 

PPS (Peripheral Pin Select)

These pins can be re-located to any desired pin on the Papilio.

gpio_spp_data(0) <= sigmadelta_spp_data(0); -- PPS0 : SIGMADELTA DATA
gpio_spp_data(1) <= timers_pwm(0); -- PPS1 : TIMER0
gpio_spp_data(2) <= timers_pwm(1); -- PPS2 : TIMER1
gpio_spp_data(3) <= spi2_mosi; -- PPS3 : USPI MOSI
gpio_spp_data(4) <= spi2_sck; -- PPS4 : USPI SCK
gpio_spp_data(5) <= sigmadelta_spp_data(1); -- PPS5 : SIGMADELTA1 DATA
gpio_spp_data(6) <= uart2_tx; -- PPS6 : UART2 DATA
gpio_spp_data(8) <= sid_audio;
spi2_miso <= gpio_spp_read(0); -- PPS0 : USPI MISO
uart2_rx <= gpio_spp_read(1); -- PPS0 : USPI MISO

Extended PPS (Only valid for the Pin Select version)

gpio_spp_data(0) <= sigmadelta_spp_data(0); -- PPS0 : SIGMADELTA DATA
gpio_spp_data(1) <= timers_pwm(0); -- PPS1 : TIMER0
gpio_spp_data(2) <= timers_pwm(1); -- PPS2 : TIMER1
gpio_spp_data(3) <= spi2_mosi; -- PPS3 : USPI MOSI
gpio_spp_data(4) <= spi2_sck; -- PPS4 : USPI SCK
gpio_spp_data(5) <= sigmadelta_spp_data(1); -- PPS5 : SIGMADELTA1 DATA
gpio_spp_data(6) <= uart2_tx; -- PPS6 : UART2 DATA
gpio_spp_data(8) <= VGA_RED(3);
gpio_spp_data(9) <= VGA_RED(2);
gpio_spp_data(10) <= VGA_GREEN(3);
gpio_spp_data(11) <= VGA_GREEN(2);
gpio_spp_data(12) <= VGA_BLUE(3);
gpio_spp_data(13) <= VGA_BLUE(2);
gpio_spp_data(14) <= VGA_VSYNC;
gpio_spp_data(15) <= VGA_HSYNC;
  

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