Why Oscilloscope Bandwidth Matters

August 8th, 2014

This is a great article about why Oscilloscope Bandwidth matters. If you are looking to buy a new Oscope soon then give this a read. Thanks Adafruit!

The most obvious factor when choosing an oscilliscope is bandwidth. 50MHz is better than 20MHz, and 100MHz is definitely better than 50MHz, etc., but what does that number really mean, and how fast is fast enough for your needs? There are already some good resources out there that go into exhaustive details on this … but for the executive summary read on.

A CPLD Video Card With VGA And NTSC

August 7th, 2014

NTSCHere is a project to generate VGA and NTSC from a CPLD.

The brains of the outfit is a $5, 100-pin CPLD from Xilinx. Apart from that, the rest of the components are a crystal, PLL, and an almost hilarious number of resistors for the R2R ladder. The one especially unique component is the 25.056815 MHz crystal – multiply by that by two, and it’s fast enough to drive a VGA monitor. Divide the crystal by seven, it’s the 3.579545 MHz you need for an NTSC colorburst frequency. That’s VGA and NTSC in a single programmable logic project, something the one FPGA project we could find that did color NTSC couldn’t manage.

Intelligent LEDs – Using WS2812B LEDs with the Papilio.

July 30th, 2014

 

Hamster shows us how to use the latest and greatest WS2812B LEDs!

Ws2812b leds.jpg

The interface is pretty simple – the state of the bus has to be reset by holding the data signal low for 50us, followed with sending out 24 bits for each LED that is connected in the string. The ’1′ bits are sent by driving the data line high for 0.9us, followed by driving the line low for 0.35ns, The ’0′ bits are sent by driving the line high for 0.35us, then driving it low for 0.90us. The frame is in 8-bit Green, 8-bit Red then 8-bit Blue format, and within each colour the MSB is sent first.

DIY: build your own oscilloscope

July 29th, 2014

Check out this cool FPGA project to make a DIY oscilloscope done for a school project. Nicely done!

We( Haolin and Joris ) built this oscilloscope last semester for a school project. The ADC chosen is a high performance differential ADC which uses Low-voltage differential signaling (LVDS). A FPGA is used to interface the ADC accounting for its properties such as high clock frequency, parallelism and differential inputs/outputs. The back-end software is written in QT with OpenGL libraries. This software supports oscilloscope and FFT functions.

PLIP August 2014: Soft Core Processor with ZPUIno / ZAP / Papilio

July 28th, 2014

http://youtu.be/NnH1juJZVoo

Colin O’Flynn makes a cool video showing the ZAP IDE in action! Watch as he makes a custom PWM peripheral, adds it into the ZPUino Soft Processor, and writes C code to control it.

Jump to 37:10 mark to see it working! Full details at http://programmablelogicinpractice.com in August 2014 Issue of Circuit Cellar. Code is located as a link on that blog post.

 

Visiting a PCB factory in Shanghai.

July 22nd, 2014

More pictures of Jack Gassett visiting a PCB factory in Shanghai with Jingfeng of Linksprite:

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More Pictures From A Lake In Beijing!

July 18th, 2014

Here are more pictures from a lake in Beijing:

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