First Impression on the ESP8266 Serial-to-WiFi Module

November 18th, 2014

Very nice writeup of using the ESP8266 $5 WIFI module.

IMG_3193

What is Serial-to-WiFi? Simply put, it means using serial TX/RX to send and receive Ethernet buffers, and similarly, using serial commands to query and change configurations of the WiFi module. This is quite convenient as it only requires two wires (TX/RX) to communicate between a microcontroller and WiFi, but more importantly, it offloads WiFi-related tasks to the module, allowing the microcontroller code to be very light-weighted.

SmartMatrix Animated GIF Player

November 13th, 2014

Nice guide and library for playing animated GIFs on those RGB LED Array’s. We should be able to port this library to the ZPUino for use with the RGB LED Wing.

 

https://www.youtube.com/watch?v=89-QXqhOJXg

This guide will show you how to add a microSD card to a Teensy 3.1 to play back animated GIFs on a 32×32 Pixel RGB LED Matrix Panel.  The Teensy 3.1 runs an Arduino sketch that decodes the animated GIF and refreshes the display at a high frame rate with good color depth.  The SmartMatrix Shield makes it easy to connect everything together. We will explain the basic soldering and wiring to connect the microSD card reader to the SmartMatrix Shield, how to compile the Arduino sketch that decodes the GIF animations, and go over options for creating your own GIFs. Bare panel on the left, mounted in an 8″x8″ shadow box frame with frosted acrylic diffuser on the right. Major Components 32×32 RGB LED Matrix Panel A 32×32 RGB LED Matrix Panel is an affordable way to add over a thousand bright pixels to your project.  Compared to a Neopixel matrix, these panels use smaller LEDs which are bright but not as blinding, and have a higher pixel density.  Unlike a Neopixel matrix, the panel requires a microcontroller to refresh the LEDs continuously to display an image.  It takes about 40% of the CPU time and most of the memory of an Arduino Uno just to refresh a panel, and that’s with a low refresh rate and a limited 12-bit color palette.  To get a better image quality, we will use a more powerful microcontroller. Teensy 3.1 Despite its small size, the Teensy 3.1 packs a lot of horsepower as it uses [...]

DIY LED Video Cube

November 11th, 2014

Now this is sick! Can we make it better with the Papilio FPGA?
led_matrix_Photo_Sep_26__12_32_32_PMcropped.jpg

JAMES DEVITO After finishing the LED Video Wall , I wanted to take advantage of the fact that each panel is modular and can be arranged in nearly any way imaginable. I present to you, the Adafruit Video Cube! Each side has 1024 LEDs, for a grand total of 6144 LEDs– it’s super bright in every direction! It works nearly identical to the LED Video Wall in that the video decoder boards do all the hard work – All you need is a DVI/HDMI/Displayport output with the proper cable, a good 5V power supply and a little wiring time. The driver supports up to 1024×800 displays. Once programmed and configured you can use any video source! This is not a beginner project! It is strongly recommended to start out with our LED Video Wall before embarking on this adventure! Because so much has to fit inside the cube, it requires some modifications that could potentially damage the hardware if you are not careful and patient! There’s also a lot of wiring and power management. We don’t sell all the components required so you may need to spend some time getting all the parts you need. Building the cube can take a few weekends and requires care and patience. Here at Adafruit we love this kind of thing, and we have documented the process as best as possible but there’s not a lot of documentation out there about these systems so even though we got our cube working nicely [...]

DCM’s

November 6th, 2014

Here is another great Xilinx App Note that sheds light on Digital Clock Managers available for Spartan 3 and 6 chips.

Xilinx_logo_spot

Digital Clock Managers (DCMs) provide advanced clocking capabilities to Spartan™-3 FPGA applications. DCMs optionally multiply or divide the incoming clock frequency to synthesize a new clock frequency. DCMs also eliminate clock skew, thereby improving system performance. Similarly, a DCM optionally phase shifts the clock output to delay the incoming clock by a fraction of the clock period. The DCMs integrate directly with the FPGA’s global low-skew clock distribution network.

Great news! Papilio DUO, Computing Shield, and LogicStart Shield going into production at Seeed Studio!

November 4th, 2014

 

Great news, I just made payment to Seeed Studio to start manufacturing the first batch of boards! They expect to easily meet the December delivery time frame and may even have them completed in November. :) We had a bit of a scare and a last minute scramble due to a global shortage of ATmega32U4 chips in the QFN package. We were actually ready to start manufacturing the boards at the beginning of October but were unable to find ATmega32U4 chips in any of the normal distribution channels! Digikey reported that chips should be back in stock on November 5th, which would be enough time manufacture the Papilio DUO by December. But, it has been my experience that you can’t trust those estimated stock dates, if that date were to slip at all we would not be able to deliver the Papilio DUO in December. So Seeed Studio and I sprang into action after discovering that there was quite a bit of stock of the ATmega32U4 chip in the TQFP footprint available. I quickly made a new revision of the Papilio DUO board that has both the QFN and TQFP footprint and Seeed Studio was kind enough to rush the updated design through their prototyping service. They already have all of the parts lined up and are now doing the final tests with the prototype, as soon as it passes they will put the DUO on their production line.  Here are pictures of the prototypes [...]

 

via www.kickstarter.com

 

Guide for Generating ROMs and BRAM Memory

October 30th, 2014

Hamster tipped us off to this nice guide about generating memories with the Xilinx wizards.

The objective of this lab is to illustrate the use of ROM and block RAM memories located inside the FPGA – a Spartan-6 in the case of our Atlys board. We’ll learn how to use the ISE’s Core Generator tool to create BRAMs. Depending on what your course project will do, you may need to use such memories in your project.

Screen Shot 2014-10-31 at 8.56.53 AM

The contents of these memories will be read continuously and displayed on the 7 LEDs. Slide switch SW(0) is used to select between the two outputs of the two memories to drive the LEDs. A simplified representation of this functionality is shown in the block diagram in Fig.1.

 

 

 

SDRAM Controller

October 28th, 2014

Here is a very interesting Xilinx App note that includes full VHDL code for interfacing to a SDRAM chip. I’ve been meaning to see if this could be adapted as an example for the Papilio Pro, but never seem to find the time…

 

Xilinx_logo_spot

This document describes the VHDL design for interfacing CoolRunner™-II CPLDs with low power Mobile SDRAM memory devices. Mobile SDRAM is the ideal memory solution for wireless, handheld, and mobile computing applications, making this a perfect match with the Xilinx CoolRunner-II low power CPLD family.

Yet Another Synth project updated with drum from SD Card.

October 23rd, 2014

Papilio User Thomas just posted an updated video of his “Yet Another Synth” project with a new update, drums from the SD Card.

https://www.youtube.com/watch?v=XX9kjhRqEsM

via gadgetfactory forum

I finally manage to add drum. Actually it read sample from the SD card. The current design is limited to one drum sound at the time. But I have in mind to enhance the system and be able to reproduce 4 drum sound in the same time in addition to the other sound ( up to 252 ).