See Through the Eyes of a Robot with FPGA

May 26th, 2016


Hello FPGA lovers! Today’s project focuses on a key aspect of artificial intelligence and robotics. Robotic Vision is something different from human perception and understanding this and coding for Vision with FPGA can be a great step towards building projects which depend on robotic perception and vision using FPGA.

The materials needed, apart from your FPGA board, are a 2.8” TFT screen, an OV7670 camera board with no FIFO and DuPont cables. The author has added links to all these components in step 1 from where you can buy them directly. Though the interconnections have not been shown in the form of an image by the author, the pin assignments (you may have to adapt this to your FPGA) of the FPGA board in interfacing it with the TFT screen and Camera have been mentioned in step3. The UCF (.ucf) file which contains more detailed interconnections can be obtained from the zip file in step 1.

The code has been broken down into modules and VHDL (.vhd) is the language used. The VHDL files can be found when you open the zip file and each module has a description given on the header. A detailed explanation and working of the code is given in step 4 along with a Top level block diagram.

Once you are done with the interconnections of the camera and TFT with the FPGA, you can upload the BIN file. The code has been designed to detect threshold values of primary Red, Blue and Green colors from an image scanned by the camera. If these threshold values are detected, the screen shows white spots in the corresponding areas and remains black in the other areas. This perspective can help you implementing advanced DSP modules when you build a robot which relies on vision.

Sayonara baby!


By Dennisv15

Lose Yourself in the LED Timer Game with FPGA

May 24th, 2016


Hey FPGA lovers! If you have ever been a fan of arcade games, here is a chance for you to re live the glory days! The LED timer game with FPGA consists of an LED-button interfacing with FPGA. The project is really simple to implement and it is a great first project for FPGA aspirants. The game is similar to the moving light arcade game, where you press a button when a particular color LED glows. As you progress the game gets faster and harder!

The hardware requirements for the project are a FPGA board, Male to Male jumpers, 10 LEDs (9 of which are the same color) and breadboards. The project has been coded by the author for a 10 LED version. The wiring details are given in step 7. However you can extend this to any number of LEDs once you go through the code.

Though any board can be used for this project, the author has shared VHDL codes for Nexys 3. So here you have a good challenge adapting the given code to your FPGA. Another interesting aspect is that you may need to adapt the implementation of the button that is required for the game. So the hardware interfacing not only involves connecting LEDs to FPGA, but thinking a bit outside of the box to get around this minor drawback.

The pieces of software required for this project are Xilinx and Adept. The code has been broken into modules and explained well in step 5. The code consists of a number of modules in VHDL (.vhd) that consists of using the primary button for playing, Display for keeping score and LEDs for driving the game.

The author has done a great job in providing clear instructions and the codes have been written following simple logic. Another major factor is the flexibility in scale of the project where you can implement this game to cover 10 LEDs or even 100s of them. Game on!


By ekchen35649

Build Your Own Digitized Tic Tac Toe with FPGA

May 13th, 2016

F01UDFMI3H4XTYT.MEDIUMGreetings FPGA enthusiasts! Today’s project is a rather exciting one where we will attempt to build a Digitized Version of the popular Tic Tac Toe game with FPGA. This Tic Tac Toe FPGA implementation is pretty simple so this is a great project for a newbie too. So game on!

The Hardware requirements are pretty decent and the cost of this project is quite affordable. The things you will need are breadboards, buttons, LEDs (preferably 3 colors), jumper cables and the your FPGA board.

The entire project is based upon how to build a single LED controller with FPGA, and once you do master this, you can extend it to building your conventional 3×3 array. Once you build a multi LED controller, simply interface them with the FPGA using a XOR network as the author has described. Follow the given steps for interconnections and take care while using the PMOD port since the author did lose a few LEDs to it!

Once the interfacing part is done, you can start programming in VHDL (.vhd) to code the victory conditions. An interesting thing is that these conditions are coded only using 2 “if” loops, but they are substantial in size. An interesting challenge in the project will be to code for “tie” cases. A separate module has been used by the author to reduce the complexity in the code and make it easily decipherable.

If you would like to jump right into the game you can download the zip file in step 10 and implement it using VHDL and the .bit file using Adept. The codes have been well segregated into modules and are pretty easy to understand even if you are new to the FPGA world! Simply wire the components as shown, and download the code into your FPGA board to start gaming.


By RyanFrawley



Build Your Own Hexapod Robot with FPGA

May 11th, 2016



Hello FPGA lovers! Today’s project is going to be a challenge on mainly 3 fronts. The Project at hand is to build a Hexapod Robot based on FPGA, and the 3 challenges are to get the Hexapod to work with FPGA, design and simulate it with CAD and to carve and glue the parts with plywood. Sounds funny!

The Hexapod Robot basically works on 12 DC servo motors. So if you thought that programming one of those with your FPGA was hard work, then you should definitely try this project to build on experience. The Robot consists of 6 arms, and each arm must have 2 degrees of freedom, the vertical and horizontal axis. For this, 2 motors are used per arm. Other than that, you will need a saw, electric drill, electric grinder, pencil, PU glue, Plywood, screws, nuts, ball bearings and, of course your FPGA board.

But if you are not a fan of all the carpentry work, then you can easily design and print your parts using a 3D printer and then just assemble them.

The Author has sadly not shared the CAD files or VHDL files for this project. However you can leave a request on the comments page to see if you get a response. The different software that you will need for this project is CAD, EDA and VHDL.

Since the VHDL code will be just about controlling 12 DC servo motors with an FPGA, you can use the code here which is the basic module to control one motor. You can simply extend this to 12 motors to get the Hexapod running.

Though the author has not shared the codes, he has been pretty helpful in giving pictures of all the development phases of the Hexapod. You can use these while designing parts in the CAD software.

Now it´s your turn…have fun!


By costaud

Craft Your Own Bit Runner Game Using FPGA

May 5th, 2016

Hello FPGA fans! Today’s project is going to be a great domain for you to have a bit of fun (once you’ve completed it) and learn more aspects about FPGA and applications in shift registers and button interfacing with FPGA. The project is based on a bit runner game, and for those unfamiliar with what the game is, you can follow the link here for a detailed understanding. In this version however, all you can do will be to dodge the LED lights flowing down as described in the project.

The Hardware

You will need a FPGA board and for this project, any Papilio board with LogicStart MegaWing is compatible. The other peripherals that you will need include a handful of LEDs (9 if you are going to follow this project as it is), a push button, a few jumper wires and a breadboard. The author has given a detailed description of interconnects in the 2nd step, and a number of snapshots that you can easily follow.

The Software

Xilinx Design Suite has been used to code and assemble this project in the software aspect. The codes have been broken into modules and each line’s significance has been commented right next to it. The coding has been done in VHDL (.vhd) and has been broken into 8 parts of instructions to follow easily.

Two suggestions by the author to upgrade this game are to use a DAC and speakers for audio outputs when you play in the form of beeps when you successfully dodge. Another thing you can do is to add an LCD display instead of LEDs. A suggestion that I have is to use a clock booster as you progress into the game to make the frequency of obstacles higher and thereby make the game more challenging.

Now, it´s your time to have fun!


By NealN

Build Your Own SuperH CPU with FPGA

May 3rd, 2016

SH1Hello FPGA enthusiasts! Today’s post is a rather special one since it throws open doors to a 32 bit CPU that you can quite simply build with a Spartan 6 FPGA board. Hitachi’s SuperH CPU patents have passed the 25 year mark, and this means that the technology can be reproduced at much lower costs by anyone up to the challenge.

The SuperH technology is a 32-bit RISC architecture ISA from Hitachi that can be used in microcontrollers and microprocessors for embedded applications. Though the CPU can be made extremely efficient in terms of memory usage thanks to the fact that it supports 16 bit instructions, SuperH on your FPGA does have its limitations in the form of MMU and FPU. However this technology can be used to build a super powerful tool either for private projects or for general computing purposes.

With the expiry of the SuperH patents, a new project called J2 has been created, which is the open source platform for SuperH technology. Commonly called the J-Core project, it instructs anyone interested on how to convert an  FPGA board into this powerful processor on a very simple way. A Spartan 6 FPGA like the Papilio Pro can be used for this purpose.  The Open Source codes are done in VHDL and are all available as open source files in the J-core site.  Why don´t you try them on your Papilio board?

The detailed steps that you will need to build your J-Core are given here. The processor runs on Linux. The patents of SuperH regarding MMU and FPU are yet to expire, but once it does, J-Core will be a more powerful platform.  The J-Core project is still under evolution and you can closely follow it to make your FPGA J-Core processor stay updated.


By Jim Turley

Groove to Your 8 Step Synthesizer Rhythms with FPGA

April 28th, 2016

Hello FPGA lovers! Today’s project will be a special one that will pique the interest of FPGA lovers and music makers alike! The project is about how to build an 8 step synthesizer with an FPGA board!

The 8 step Synthesizer is a set of 8 switches with a time line that flows from left to right. A button determines the frequency (higher and lower octaves) of the note. Pressing another button can alter the frequency. This way you can build your own 8 note theme to groove to. This project is highly based upon the Tone Matrix game.

The Hardware

The FPGA board suggested is the Nexys 2, but you can perfectly adapt this project to fit your FPGA board.  You may use this other projects as a guide to make your own 8 step synthesizer with your Papilio board. The other 2 things you will need are a speaker for output and a computer for coding/uploading. The board already has all other necessary requirements addressed.

The Coding

The code for implementing this project is available from the page and it´s divided into modules. The coding language is VHDL (.vhd). I strongly suggest (and the author does it too) you also create a UCF file according to your pin assignment conveniences.

The modules are divided based on functionality and each module is crucial. The clock divider module, for instance, converts the 50 MHz cycles of the FPGA board and gives a smaller frequency which holds the note for an audible time.  The square wave module organizes the notes in 8 steps from 440 Hz to 1046.5 Hz which is the scale.


The circuit diagram showing how the components are connected is provided. The significance regarding Frequency incrementing, Play and Pause, Flip Flops and the Mux-Speaker arrangement are well explained. A detailed step regarding Speaker interfacing with the FPGA board is also given in the page.


This project is very straightforward and it will be a fun experience for hobbyists and FPGA learners, for sure.




By rinkintran

Get Ready to Bop It! With FPGA

April 26th, 2016


Hello FPGA enthusiasts! Today we have a close enough version of the popular Bop It! Game. For those unfamiliar with what a Bop It! Game is, I will tell you that it is practically a quick reflex based game that has a set of voice commands that give you instructions to perform tasks with the console.

As the game progresses, it gets faster paced and this is the challenge for any FPGA enthusiast.

There are basically 4 main points in this project:

  1. Figuring out the right functionalities and the right modules to use for them. Integrating them with your FPGA and coding it.
  2. Figuring the clock cycles needed for each module and ensuring that the separate clocks don’t clash with the main module of the program.
  3. LED displays instead of voice prompts are a stroke of genius from the author, but integrating this too can be a bit of work.
  4. External button compatibility with FPGA is the final and most crucial challenge, but where there is a will, there is a way!

The codes have been implemented in .vhd (VHDL) formats for easy compatibility with the hardware and the author has provided the different modules. This way the code can be better understood as it is broken into parts.

If you plan on implementing your own functionalities in the console you will have to key in your own codes and this can be a welcome challenge.

So embrace the opportunity to learn FPGA in a new light, and don’t forget to Bop It!

By omrinissan2013