Papilio.Learning History

Hide minor edits - Show changes to output

Changed line 3 from:
(:keywords FPGA, Xilinx, Papilio platform, Firefly platform, Wings, FPGA development, electronics, FPGA India, embedded processors, open source hardware, configurable logic:)
to:
(:keywords FPGA, Xilinx, Papilio platform, Firefly platform, Wings, FPGA development, electronics, FPGA India, embedded processors, open source hardware, configurable logic, Arduino:)
Added line 71:
** [[64bit Windows 8 Bug]] - This bug prevents you from loading license file during install.
Added line 28:
** [[64bit Windows 8 Bug]] - This bug prevents you from loading license file during install.
June 04, 2013, at 05:59 PM by Jack Gassett -
Changed line 45 from:
* [[ZPUinoIntroduction|ZPUino User Guide]] - Learn about the ZPUino Soft Processor.
to:
* [[ZPUinoUserGuide|ZPUino User Guide]] - Learn about the ZPUino Soft Processor.
May 31, 2013, at 05:40 PM by Jack Gassett -
Deleted line 26:
* [[ZPUinoIntroduction|ZPUino Quick Start]] - Run sketches on the ZPUino Soft Processor.
May 30, 2013, at 01:00 PM by Jack Gassett -
Changed lines 46-47 from:
* [[ZPUinoIntroduction|ZPUino Quick Start]] - Run sketches on the ZPUino Soft Processor.
to:
* [[ZPUinoIntroduction|ZPUino User Guide]] - Learn about the ZPUino Soft Processor.
* [[ZAP IDE|ZAP IDE Quick Start]] - Run sketches on the AVR8 and ZPUino Soft Processors
.
Added line 53:
* [[ZAP IDE|ZAP IDE Quick Start]] - Run sketches on the AVR8 and ZPUino Soft Processors.
May 29, 2013, at 05:34 PM by Jack Gassett -
Changed line 26 from:
* [[ZAP IDE|ZAP IDE Quick Start]] - Run sketches on the AVR8 and ZPUino Soft Processors with Papilio boards.
to:
* [[ZAP IDE|ZAP IDE Quick Start]] - Run sketches on the AVR8 and ZPUino Soft Processors.
May 29, 2013, at 05:34 PM by Jack Gassett -
Added line 26:
* [[ZAP IDE|ZAP IDE Quick Start]] - Run sketches on the AVR8 and ZPUino Soft Processors with Papilio boards.
May 23, 2013, at 03:35 PM by Jack Gassett -
Added line 16:
\\
May 23, 2013, at 03:35 PM by Jack Gassett -
Changed line 18 from:
!!!Papilio Learning | [[#GetStarted|Get Started]] - [[#Section1|Papilio Basics]] - [[#Section2|Soft Processors]] - [[#Section3|FPGA Basics]]
to:
!!!Papilio Learning
May 23, 2013, at 03:34 PM by Jack Gassett -
Added lines 17-20:
>>round frame<<
!!!Papilio Learning | [[#GetStarted|Get Started]] - [[#Section1|Papilio Basics]] - [[#Section2|Soft Processors]] - [[#Section3|FPGA Basics]]
>><<
Deleted line 21:
!!Papilio Learning
May 23, 2013, at 03:16 PM by Jack Gassett -
Changed line 48 from:
*[[Custom AVR8 Soft Processor]] - Make a custom AVR8 with just the functionality you need for use with the Arduino IDE.
to:
*[[Custom AVR8 Soft Processor]] - Make a custom AVR8 with just the functionality you need.
May 23, 2013, at 03:15 PM by Jack Gassett -
Changed line 63 from:
*[[Papilio.GettingStartedISE|Xilinx ISE Webpack Quick Start]] - Start learning VHDL with this Quick Start Guide for the Xilinx ISE Webpack software.
to:
* [[GettingStartedISE|Xilinx ISE Quick Start]] - Setup the tools to write your own VHDL or Verilog.
Changed line 68 from:
*[[Analyze Remote Control Commands]] - Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer.
to:
*[[Analyze Remote Control Commands|Analyze Remote Control]] - Analyze IR data sent by an infrared remote control with the "Sump" Logic Analyzer.
May 23, 2013, at 03:14 PM by Jack Gassett -
Changed lines 12-13 from:
[[#ZPUino|ZPUino]][[<<]]
[[#AVR8|AVR8]][[<<]]
to:
->[[#ZPUino|ZPUino]][[<<]]
->[[#AVR8|AVR8]][[<<]]
May 23, 2013, at 03:13 PM by Jack Gassett -
Changed lines 12-13 from:
->[[#ZPUino|ZPUino]][[<<]]
->[[#AVR8|AVR8]][[<<]]
to:
[[#ZPUino|ZPUino]][[<<]]
[[#AVR8|AVR8]][[<<]]
May 23, 2013, at 03:13 PM by Jack Gassett -
Added lines 12-13:
->[[#ZPUino|ZPUino]][[<<]]
->[[#AVR8|AVR8]][[<<]]
Added line 39:
[[#ZPUino]]
Added line 45:
[[#AVR8]]
May 23, 2013, at 03:10 PM by Jack Gassett -
Changed line 21 from:
* [[GettingStartedISE|Xilinx ISE Quick Start]] - Setup the environment to write your own VHDL or Verilog.
to:
* [[GettingStartedISE|Xilinx ISE Quick Start]] - Setup the tools to write your own VHDL or Verilog.
Deleted lines 36-38:
!!!AVR8 Soft Processor
* [[AVR8 Shifty Variant]] - Learn how to move pins on the fly with the AVR8 Shifty variant.
Changed line 39 from:
* [[VGAWingIntroduction|VGA Introduction]] - Learn how to use the [[VGAOverview||VGA Papilio Wishbone Peripheral]] to output graphics.
to:
* [[VGAWingIntroduction|VGA Introduction]] - Learn how to use the [[VGAOverview|VGA Papilio Wishbone Peripheral]] to output graphics.
Added lines 41-49:

!!!AVR8 Soft Processor
* [[AVR8 Shifty Variant]] - Learn how to move pins on the fly with the AVR8 Shifty variant.
*[[Custom AVR8 Soft Processor]] - Make a custom AVR8 with just the functionality you need for use with the Arduino IDE.
*[[Custom AVR8 User Core|AVR8 Custom User Core]] - Make your own peripheral core in VHDL or Verilog to run in the AVR8.
*[[Simulate a Custom AVR8 User Core|Simulate AVR8]] - Use simulation to debug your custom user core or to learn about the AVR8 internals.
*[[Run Arduino Sketches]] - See how to run sketches and move the Arduino core SPI pins on the fly.
*[[Run BASCOM Basic Code| Run Bascom BASIC Code]] - Run Bascom BASIC code on the AVR8 soft processor.
*[[Working with Arduino Core]] - Make a simple change to the Arduino core in order to move a PWM pin with VHDL.
Added lines 56-59:
!!!VHDL
*[[http://forum.gadgetfactory.net/index.php?/page/articles.html/_/papilio/logicstart-megawing/intro-to-spartan-fpga-ebook-r34|Papilio VHDL eBook]] - Free VHDL eBook written for the Papilio and LogicStart MegaWing.
* [[http://www.freerangefactory.org/dl/free_range_vhdl.pdf|Free Range VHDL]] - Free VHDL eBook written by Bryan Mealy and Fabrizio Tappero.
*[[Papilio.GettingStartedISE|Xilinx ISE Webpack Quick Start]] - Start learning VHDL with this Quick Start Guide for the Xilinx ISE Webpack software.
Changed line 61 from:
*[[High Speed UART]]: Use a Xilinx reference design to implement high speed (3Mb/s) serial communications.
to:
*[[High Speed UART]] - Use a Xilinx reference design to implement high speed (3Mb/s) serial communications.
Changed lines 63-64 from:
*[[Debug Internal FPGA Logic]]:Learn how to debug digital logic running inside of the Papilio's FPGA.
*[[Analyze Remote Control Commands]]: Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer.
to:
*[[Debug Internal FPGA Logic]] - Learn how to debug digital logic running inside of the Papilio's FPGA.
*[[Analyze Remote Control Commands]] - Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer.
Changed lines 66-70 from:
*[[Digital Clock Manager]]: Create clocks with custom speeds between 2Mhz and 250Mhz.
!!!VHDL
*[[http://forum.gadgetfactory.net/index.php?/page/articles.html/_/papilio/logicstart-megawing/intro-to-spartan-fpga-ebook-r34|Papilio VHDL eBook]] - Free VHDL eBook written for the Papilio and LogicStart MegaWing.
* [[http://www.freerangefactory.org/dl/free_range_vhdl.pdf|Free Range VHDL]] - Free VHDL eBook written by Bryan Mealy and Fabrizio Tappero.
*[[Papilio.GettingStartedISE|Xilinx ISE Webpack Quick Start]]: Start learning VHDL with this Quick Start Guide for the Xilinx ISE Webpack software
.
to:
*[[Digital Clock Manager]] - Create clocks with custom speeds between 2Mhz and 250Mhz.
Deleted lines 67-79:

----
[[#Section2]]
!!! Soft Processor and Arduino Core
*[[Custom AVR8 Soft Processor]]: Make a custom AVR8 with just the functionality you need for use with the Arduino IDE.
*[[Custom AVR8 User Core|AVR8 Custom User Core]]: Make your own peripheral core in VHDL or Verilog to run in the AVR8.
*[[Simulate a Custom AVR8 User Core|Simulate AVR8]]: Use simulation to debug your custom user core or to learn about the AVR8 internals.
*[[Run Arduino Sketches]]: See how to run sketches and move the Arduino core SPI pins on the fly.
*[[Run BASCOM Basic Code| Run Bascom BASIC Code]]: Run Bascom BASIC code on the AVR8 soft processor.
*[[Working with Arduino Core]]: Make a simple change to the Arduino core in order to move a PWM pin with VHDL.
!!!Infrared
*[[Infrared Quick Start]]: Get started with a sketch to decode IR commands.
*[[Analyze Remote Control Commands]]: Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer.
May 23, 2013, at 03:06 PM by Jack Gassett -
Changed lines 11-12 from:
[[#Section4|Soft Processors]][[<<]]
to:
[[#Section2|Soft Processors]][[<<]]
[[#Section3|FPGA Basics
]][[<<]]
Added line 27:
>>round frame<<
Changed lines 31-32 from:
to:
>><<

----
[[#Section2]]
!!! Soft Processors
>>round frame<<
Changed lines 44-46 from:
to:
>><<

----
[[#Section3]]
!!! FPGA Basics
>>round frame<<
Changed lines 57-59 from:
!!!Xilinx tools
to:
!!!VHDL
*[[http://forum.gadgetfactory.net/index.php?/page/articles.html/_/papilio/logicstart-megawing/intro-to-spartan-fpga-ebook-r34|Papilio VHDL eBook]] - Free VHDL eBook written for the Papilio and LogicStart MegaWing.
* [[http://www.freerangefactory.org/dl/free_range_vhdl.pdf|Free Range VHDL]] - Free VHDL eBook written by Bryan Mealy and Fabrizio Tappero.
Added line 61:
>><<
May 23, 2013, at 02:58 PM by Jack Gassett -
Changed lines 10-11 from:
[[#Section1|Wishbone Peripherals]][[<<]]
[[#Section4|Papilio Pinouts]][[<<]]
to:
[[#Section1|Papilio Basics]][[<<]]
[[#Section4|Soft Processors]][[<<]]
Changed lines 25-26 from:
!!! Papilio Introduction
(:pagelist trail=
Papilio.IntroTrail :)
to:
!!! Papilio Basics
* [[GettingStarted|
Papilio Quick Start]] - Install basic Papilio software and load a bit file.
* [[Pinouts|Papilio Pins]] - Learn about the Papilio WingSlot scheme.
* [[PapilioOneQuickstartSketch|Papilio QuickStart Sketch]] - Learn from the Quick Start sketch that ships with the Papilio.


!!!AVR8 Soft Processor
* [[AVR8 Shifty Variant]] - Learn how to move pins on the fly with the AVR8 Shifty variant.

!!!ZPUino Soft Processor
* [[ZPUinoIntroduction|ZPUino Quick Start]] - Run sketches on the ZPUino Soft Processor.
* [[VGAWingIntroduction|VGA Introduction]] - Learn how to use the [[VGAOverview||VGA Papilio Wishbone Peripheral]] to output graphics.
* [[VGALiquidCrystalDemo|VGA Liquid Crystal Demo]] - See how to convert LiquidCrystal LCD sketches to VGA!

May 23, 2013, at 02:45 PM by Jack Gassett -
Changed line 19 from:
* [[ZPUinoIntroduction|ZPUino Quick Start]] - Get started with sketches on the ZPUino Soft Processor.
to:
* [[ZPUinoIntroduction|ZPUino Quick Start]] - Run sketches on the ZPUino Soft Processor.
May 23, 2013, at 02:45 PM by Jack Gassett -
Deleted line 12:
\\
May 23, 2013, at 02:45 PM by Jack Gassett -
Deleted lines 12-14:

[[#GetStarted]]
!!Papilio Learning
Added lines 15-16:
[[#GetStarted]]
!!Papilio Learning
May 23, 2013, at 02:44 PM by Jack Gassett -
Added lines 13-15:

[[#GetStarted]]
!!Papilio Learning
Deleted lines 17-18:
[[#GetStarted]]
!!Papilio Learning
May 23, 2013, at 02:44 PM by Jack Gassett -
Added line 13:
\\
May 23, 2013, at 02:43 PM by Jack Gassett -
Added line 19:
* [[ZPUinoIntroduction|ZPUino Quick Start]] - Get started with sketches on the ZPUino Soft Processor.
Deleted line 20:
* [[ZPUinoIntroduction|ZPUino Quick Start]] - Get started with sketches on the ZPUino Soft Processor.
May 23, 2013, at 02:43 PM by Jack Gassett -
Changed line 9 from:
[[#General|Get Started]][[<<]]
to:
[[#GetStarted|Get Started]][[<<]]
Added line 14:
[[#GetStarted]]
Deleted lines 15-17:
(:divend:)
(:table cellspacing=40:)
(:cellnr:)
Added line 17:
>>round frame<<
Changed lines 21-24 from:
to:
>><<

----
[[#Section1]]
Added lines 37-38:
----
[[#Section2]]
May 23, 2013, at 02:41 PM by Jack Gassett -
Changed lines 5-13 from:
(:div style='text-align:left;':)
to:
>>lrindent round frame float:right width:400px<<
'''Contents'''
[[<<]]
[[#General|Get Started]][[<<]]
[[#Section1|Wishbone Peripherals]][[<<]]
[[#Section4|Papilio Pinouts]][[<<]]
>><<
Changed line 34 from:
(:cell:)
to:
Deleted line 44:
(:tableend:)
May 23, 2013, at 02:39 PM by Jack Gassett -
Added lines 10-14:
!!! Getting Started
* [[GettingStarted|Papilio Quick Start]] - Install basic Papilio software and load a bit file.
* [[GettingStartedISE|Xilinx ISE Quick Start]] - Setup the environment to write your own VHDL or Verilog.
* [[ZPUinoIntroduction|ZPUino Quick Start]] - Get started with sketches on the ZPUino Soft Processor.
May 21, 2013, at 05:22 PM by Jack Gassett -
Changed line 1 from:
(:title Papilio Tutorials:)
to:
(:title Papilio Learning:)
Deleted line 4:
(:include LearningHeader:)
Changed line 6 from:
!!Papilio Tutorials
to:
!!Papilio Learning
May 02, 2013, at 10:10 AM by Jack Gassett -
Changed line 21 from:
*[[Xilinx ISE Webpack Quick Start]]: Start learning VHDL with this Quick Start Guide for the Xilinx ISE Webpack software.
to:
*[[Papilio.GettingStartedISE|Xilinx ISE Webpack Quick Start]]: Start learning VHDL with this Quick Start Guide for the Xilinx ISE Webpack software.
April 17, 2012, at 01:24 PM by Jack Gassett -
Deleted line 2:
Deleted line 3:
Deleted line 4:
Deleted line 5:
April 17, 2012, at 01:23 PM by Jack Gassett -
Added lines 22-25:
!!!Clocks
*[[Digital Clock Manager]]: Create clocks with custom speeds between 2Mhz and 250Mhz.
!!!Xilinx tools
*[[Xilinx ISE Webpack Quick Start]]: Start learning VHDL with this Quick Start Guide for the Xilinx ISE Webpack software.
Deleted lines 36-39:
!!!Clocks
*[[Digital Clock Manager]]: Create clocks with custom speeds between 2Mhz and 250Mhz.
!!!Xilinx tools
*[[Xilinx ISE Webpack Quick Start]]: Start learning VHDL with this Quick Start Guide for the Xilinx ISE Webpack software.
April 17, 2012, at 01:23 PM by Jack Gassett -
Added line 2:
(:notabledit:)
April 17, 2012, at 01:03 PM by Jack Gassett -
Deleted line 20:
!!!Infrared
Added line 29:
!!!Infrared
April 17, 2012, at 01:03 PM by Jack Gassett -
Deleted lines 21-26:
*[[Infrared Quick Start]]: Get started with a sketch to decode IR commands.
*[[Analyze Remote Control Commands]]: Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer.
!!!Clocks
*[[Digital Clock Manager]]: Create clocks with custom speeds between 2Mhz and 250Mhz.
!!!Xilinx tools
*[[Xilinx ISE Webpack Quick Start]]: Start learning VHDL with this Quick Start Guide for the Xilinx ISE Webpack software.
Added lines 30-35:
*[[Infrared Quick Start]]: Get started with a sketch to decode IR commands.
*[[Analyze Remote Control Commands]]: Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer.
!!!Clocks
*[[Digital Clock Manager]]: Create clocks with custom speeds between 2Mhz and 250Mhz.
!!!Xilinx tools
*[[Xilinx ISE Webpack Quick Start]]: Start learning VHDL with this Quick Start Guide for the Xilinx ISE Webpack software.
April 17, 2012, at 01:01 PM by Jack Gassett -
Added lines 14-15:
!!! Papilio Introduction
(:pagelist trail=Papilio.IntroTrail :)
March 22, 2012, at 01:45 PM by Dhia Khaladi -
Changed line 9 from:
>>lrindent round frame text-align=center<<
to:
(:div style='text-align:left;':)
Changed lines 11-12 from:
>><<
to:
(:divend:)
(:table cellspacing=40:)
(:cellnr:)
Changed lines 15-16 from:
||cellspacing=20
||
[[High Speed UART]]||Use a Xilinx reference design to implement high speed (3Mb/s) serial communications. ||
to:
*[[High Speed UART]]: Use a Xilinx reference design to implement high speed (3Mb/s) serial communications.
Changed lines 17-19 from:
||cellspacing=20
||
[[Debug Internal FPGA Logic]]||Learn how to debug digital logic running inside of the Papilio's FPGA. ||
||[[Analyze
Remote Control Commands]]||Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer. ||
to:
*[[Debug Internal FPGA Logic]]:Learn how to debug digital logic running inside of the Papilio's FPGA.
*[[Analyze Remote Control Commands]]: Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer.
Changed lines 20-22 from:
||cellspacing=20
||
[[Infrared Quick Start]]||Get started with a sketch to decode IR commands. ||
||[[Analyze
Remote Control Commands]]||Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer. ||
to:
*[[Infrared Quick Start]]: Get started with a sketch to decode IR commands.
*[[Analyze Remote Control Commands]]: Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer.
!!!Clocks
*[[Digital Clock Manager]]: Create clocks with custom speeds between 2Mhz and 250Mhz.
!!!Xilinx tools
*[[Xilinx ISE Webpack Quick Start]]: Start learning VHDL with this Quick Start Guide for the Xilinx ISE Webpack software.
(:cell:)
Changed lines 28-40 from:
||cellspacing=20
||
[[Custom AVR8 Soft Processor]]||Make a custom AVR8 with just the functionality you need for use with the Arduino IDE. ||
||[[Custom
AVR8 User Core|AVR8 Custom User Core]]||Make your own peripheral core in VHDL or Verilog to run in the AVR8. ||
||[[
Simulate a Custom AVR8 User Core|Simulate AVR8]]||Use simulation to debug your custom user core or to learn about the AVR8 internals. ||
||[[Run
Arduino Sketches]]||See how to run sketches and move the Arduino core SPI pins on the fly. ||
||[[Run BASCOM Basic
Code| Run Bascom BASIC Code]]||Run Bascom BASIC code on the AVR8 soft processor. ||
||[[Working
with Arduino Core]]||Make a simple change to the Arduino core in order to move a PWM pin with VHDL. ||
!!!Clocks
||cellspacing=20
||[[Digital Clock Manager]]||Create clocks with custom speeds between 2Mhz and 250Mhz. ||
!!!Xilinx tools
||cellspacing=20
||[[Xilinx ISE Webpack Quick Start]]||Start learning VHDL with this Quick Start Guide for the Xilinx ISE Webpack software. ||
to:
*[[Custom AVR8 Soft Processor]]: Make a custom AVR8 with just the functionality you need for use with the Arduino IDE.
*[[Custom AVR8 User Core|AVR8 Custom User Core]]: Make your own peripheral core in VHDL or Verilog to run in the AVR8.
*[[Simulate a Custom AVR8 User Core|Simulate AVR8]]: Use simulation to debug your custom user core or to learn about the AVR8 internals.
*[[Run Arduino Sketches]]: See how to run sketches and move the Arduino core SPI pins on the fly.
*[[Run BASCOM Basic Code| Run Bascom BASIC Code]]: Run Bascom BASIC code on the AVR8 soft processor.
*[[Working with Arduino Core]]: Make a simple change to the Arduino core in order to move a PWM pin with VHDL.
(:tableend:)
Deleted line 6:
Added lines 8-9:

>>lrindent round frame text-align=center<<
Added lines 11-12:
>><<
Changed lines 1-3 from:
(:title Tutorials:)

(:keywords FPGA, Papilio platform, Firefly platform, Wings, FPGA development, electronics, FPGA India, FPGA development board, embedded processors, open source hardware, soft processors, embedded processing, configurable logic, reconfigurable logic, user projects, Papilio tutorials, learning FPGA:)
to:
(:title Papilio Tutorials:)

(:keywords FPGA, Xilinx, Papilio platform, Firefly platform, Wings, FPGA development, electronics, FPGA India, embedded processors, open source hardware, configurable logic:)
Changed line 1 from:
(:title Papilio Tutorials:)
to:
(:title Tutorials:)
Added lines 1-7:
(:title Papilio Tutorials:)

(:keywords FPGA, Papilio platform, Firefly platform, Wings, FPGA development, electronics, FPGA India, FPGA development board, embedded processors, open source hardware, soft processors, embedded processing, configurable logic, reconfigurable logic, user projects, Papilio tutorials, learning FPGA:)

(:description Papilio platform is easy to use FPGA and microcontroller development platform for beginners and a powerful modular design environment for professional developers:)
April 06, 2011, at 04:48 PM by David Strathman -
Deleted line 1:
!Learning
April 06, 2011, at 04:47 PM by David Strathman -
Added line 1:
(:include LearningHeader:)
Deleted line 2:
(:include LearningHeader:)
April 05, 2011, at 11:13 AM by Jack Gassett -
Changed line 5 from:
||cellspacing=10
to:
||cellspacing=20
Changed line 8 from:
||cellspacing=10
to:
||cellspacing=20
Changed line 12 from:
||cellspacing=10
to:
||cellspacing=20
Changed line 16 from:
||cellspacing=10
to:
||cellspacing=20
Changed line 24 from:
||cellspacing=10
to:
||cellspacing=20
Changed line 27 from:
||cellspacing=10
to:
||cellspacing=20
April 05, 2011, at 11:12 AM by Jack Gassett -
Changed line 5 from:
||cellspacing=40
to:
||cellspacing=10
Changed line 8 from:
||cellspacing=40
to:
||cellspacing=10
Changed line 12 from:
||cellspacing=40
to:
||cellspacing=10
Changed line 16 from:
||cellspacing=40
to:
||cellspacing=10
Changed line 24 from:
||cellspacing=40
to:
||cellspacing=10
Changed line 27 from:
||cellspacing=40
to:
||cellspacing=10
April 05, 2011, at 11:11 AM by Jack Gassett -
Changed line 5 from:
||width=110% cellspacing=40
to:
||cellspacing=40
Changed line 8 from:
||width=110% cellspacing=40
to:
||cellspacing=40
Changed line 12 from:
||width=110% cellspacing=40
to:
||cellspacing=40
Changed line 16 from:
||width=110% cellspacing=40
to:
||cellspacing=40
Changed line 24 from:
||width=110% cellspacing=40
to:
||cellspacing=40
Changed line 27 from:
||width=110% cellspacing=40
to:
||cellspacing=40
April 05, 2011, at 11:07 AM by Jack Gassett -
Added line 5:
||width=110% cellspacing=40
Added line 8:
||width=110% cellspacing=40
Added line 12:
||width=110% cellspacing=40
Added line 16:
||width=110% cellspacing=40
Added line 24:
||width=110% cellspacing=40
Added line 27:
||width=110% cellspacing=40
April 05, 2011, at 11:04 AM by Jack Gassett -
Added line 15:
||[[Simulate a Custom AVR8 User Core|Simulate AVR8]]||Use simulation to debug your custom user core or to learn about the AVR8 internals. ||
April 01, 2011, at 05:00 PM by Jack Gassett -
Changed line 14 from:
||[[Custom AVR8 User Core]]||Make your own peripheral core in VHDL or Verilog to run in the AVR8. ||
to:
||[[Custom AVR8 User Core|AVR8 Custom User Core]]||Make your own peripheral core in VHDL or Verilog to run in the AVR8. ||
April 01, 2011, at 04:12 PM by Jack Gassett -
Changed line 5 from:
||[[High Speed UART]]||Use a Xilinx reference design to implement high speed (3Mb/s) serial communications.
to:
||[[High Speed UART]]||Use a Xilinx reference design to implement high speed (3Mb/s) serial communications. ||
Changed lines 7-8 from:
||[[Debug Internal FPGA Logic]]||Learn how to debug digital logic running inside of the Papilio's FPGA.
||[[Analyze Remote Control Commands]]||Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer.
to:
||[[Debug Internal FPGA Logic]]||Learn how to debug digital logic running inside of the Papilio's FPGA. ||
||[[Analyze Remote Control Commands]]||Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer. ||
Changed lines 10-11 from:
||[[Infrared Quick Start]]||Get started with a sketch to decode IR commands.
||[[Analyze Remote Control Commands]]||Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer.
to:
||[[Infrared Quick Start]]||Get started with a sketch to decode IR commands. ||
||[[Analyze Remote Control Commands]]||Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer. ||
Changed lines 13-16 from:
||[[Custom AVR8 Soft Processor]]||Make a custom AVR8 with just the functionality you need for use with the Arduino IDE.
||[[Run Arduino Sketches]]||See how to run sketches and move the Arduino core SPI pins on the fly.
||[[Run BASCOM Basic Code| Run Bascom BASIC Code]]||Run Bascom BASIC code on the AVR8 soft processor.
||[[Working with Arduino Core]]||Make a simple change to the Arduino core in order to move a PWM pin with VHDL.
to:
||[[Custom AVR8 Soft Processor]]||Make a custom AVR8 with just the functionality you need for use with the Arduino IDE. ||
||[[Custom AVR8 User Core]]||Make your own peripheral core in VHDL or Verilog to run in the AVR8. ||
||[[Run Arduino Sketches]]||See how to run sketches and move the Arduino core SPI pins on the fly. ||
||[[Run BASCOM Basic Code| Run Bascom BASIC Code]]||Run Bascom BASIC code on the AVR8 soft processor. ||
||[[Working
with Arduino Core]]||Make a simple change to the Arduino core in order to move a PWM pin with VHDL. ||
Changed line 19 from:
||[[Digital Clock Manager]]||Create clocks with custom speeds between 2Mhz and 250Mhz.
to:
||[[Digital Clock Manager]]||Create clocks with custom speeds between 2Mhz and 250Mhz. ||
Changed line 21 from:
||[[Xilinx ISE Webpack Quick Start]]||Start learning VHDL with this Quick Start Guide for the Xilinx ISE Webpack software.
to:
||[[Xilinx ISE Webpack Quick Start]]||Start learning VHDL with this Quick Start Guide for the Xilinx ISE Webpack software. ||
March 21, 2011, at 05:31 PM by Jack Gassett -
Changed line 13 from:
||[[Customize the AVR8 Soft Processor]]||Make a custom AVR8 with just the functionality you need for use with the Arduino IDE.
to:
||[[Custom AVR8 Soft Processor]]||Make a custom AVR8 with just the functionality you need for use with the Arduino IDE.
March 21, 2011, at 05:30 PM by Jack Gassett -
Added line 13:
||[[Customize the AVR8 Soft Processor]]||Make a custom AVR8 with just the functionality you need for use with the Arduino IDE.
March 04, 2011, at 05:21 PM by Jack Gassett -
Deleted line 1:
[[Papilio.Learning|Tutorials]] - [[Examples]] - [[Cores]]
March 04, 2011, at 05:21 PM by Jack Gassett -
Changed line 3 from:
[[LearningHeader]]
to:
(:include LearningHeader:)
March 04, 2011, at 05:19 PM by Jack Gassett -
Changed lines 2-3 from:
(:include LearningHeader:)
to:
[[Papilio.Learning|Tutorials]] - [[Examples]] - [[Cores]]
[[
LearningHeader]]
Changed line 15 from:
||[[Run Bascom BASIC Code]]||Run Bascom BASIC code on the AVR8 soft processor.
to:
||[[Run BASCOM Basic Code| Run Bascom BASIC Code]]||Run Bascom BASIC code on the AVR8 soft processor.
March 04, 2011, at 05:17 PM by Jack Gassett -
Changed line 14 from:
||[[Run BASCOM Basic Code]]||Run BASCOM code on the AVR8 soft processor.
to:
||[[Run Bascom BASIC Code]]||Run Bascom BASIC code on the AVR8 soft processor.
Changed lines 2-3 from:
[[Papilio.Learning|Tutorials]] - [[Examples]] - [[Cores]]
[[
LearningHeader]]
to:
(:include LearningHeader:)
Changed lines 2-3 from:
[[Papilio.Learning|Tutorials]] - [[Examples]]
to:
[[Papilio.Learning|Tutorials]] - [[Examples]] - [[Cores]]
[[LearningHeader
]]
Changed line 2 from:
||[[Papilio.Learning|Tutorials]]||[[Examples]]||
to:
[[Papilio.Learning|Tutorials]] - [[Examples]]
Added line 2:
||[[Papilio.Learning|Tutorials]]||[[Examples]]||
Deleted lines 1-2:
(:pagelist group=Papilio order=random count=4 fmt=title list=normal:)
Changed line 2 from:
(:pagelist group=Papilio order=random count=4 fmt=#simple list=normal:)
to:
(:pagelist group=Papilio order=random count=4 fmt=title list=normal:)
Changed line 2 from:
(:pagelist group=Papilio order=random count=4 fmt=#include list=normal:)
to:
(:pagelist group=Papilio order=random count=4 fmt=#simple list=normal:)
Added lines 2-3:
(:pagelist group=Papilio order=random count=4 fmt=#include list=normal:)
Changed lines 6-7 from:
* [[Debug Internal FPGA Logic]] - Learn how to debug digital logic running inside of the Papilio's FPGA.
* [[Analyze Remote Control Commands]] - Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer.
to:
||[[Debug Internal FPGA Logic]]||Learn how to debug digital logic running inside of the Papilio's FPGA.
||[[Analyze Remote Control Commands]]||Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer.
Changed lines 9-10 from:
* [[Infrared Quick Start]] - Get started with a sketch to decode IR commands.
* [[Analyze Remote Control Commands]] - Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer.
to:
||[[Infrared Quick Start]]||Get started with a sketch to decode IR commands.
||[[Analyze Remote Control Commands]]||Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer.
Changed lines 12-14 from:
* [[Run Arduino Sketches]] - See how to run sketches and move the Arduino core SPI pins on the fly.
* [[Run BASCOM Basic Code]] - Run BASCOM code on the AVR8 soft processor.
* [[Working with Arduino Core]] - Make a simple change to the Arduino core in order to move a PWM pin with VHDL.
to:
||[[Run Arduino Sketches]]||See how to run sketches and move the Arduino core SPI pins on the fly.
||[[Run BASCOM Basic Code]]||Run BASCOM code on the AVR8 soft processor.
||[[Working with Arduino Core]]||Make a simple change to the Arduino core in order to move a PWM pin with VHDL.
Changed line 16 from:
* [[Digital Clock Manager]] - Create clocks with custom speeds between 2Mhz and 250Mhz.
to:
||[[Digital Clock Manager]]||Create clocks with custom speeds between 2Mhz and 250Mhz.
Changed line 18 from:
* [[Xilinx ISE Webpack Quick Start]] - Start learning VHDL with this Quick Start Guide for the Xilinx ISE Webpack software.
to:
||[[Xilinx ISE Webpack Quick Start]]||Start learning VHDL with this Quick Start Guide for the Xilinx ISE Webpack software.
Changed line 4 from:
* [[High Speed UART]] - Use a Xilinx reference design to implement high speed (3Mb/s) serial communications.
to:
||[[High Speed UART]]||Use a Xilinx reference design to implement high speed (3Mb/s) serial communications.
Changed line 3 from:
* [[Debug Internal FPGA Logic]] - Learn how to debug digital logic running inside of the Papilio's FPGA.
to:
!!! UART
Added lines 5-6:
!!! Logic Analyzer
* [[Debug Internal FPGA Logic]] - Learn how to debug digital logic running inside of the Papilio's FPGA.
Changed line 8 from:
* [[Run Arduino Sketches]] - See how to run sketches and move the Arduino core SPI pins on the fly.
to:
!!!Infrared
Changed lines 10-12 from:
* [[Digital Clock Manager]] - Create clocks with custom speeds between 2Mhz and 250Mhz.
to:
* [[Analyze Remote Control Commands]] - Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer.
!!! Soft Processor and Arduino Core
* [[Run Arduino Sketches]] - See how to run sketches and move the Arduino core SPI pins on the fly
.
Added lines 15-17:
!!!Clocks
* [[Digital Clock Manager]] - Create clocks with custom speeds between 2Mhz and 250Mhz.
!!!Xilinx tools
Changed lines 11-12 from:
* [[Xilinx ISE Webpack Quick Start]] - Start learning VHDL with this Quick Start Guide for the Xilinx ISE Webpack software.
*
to:
* [[Xilinx ISE Webpack Quick Start]] - Start learning VHDL with this Quick Start Guide for the Xilinx ISE Webpack software.
Changed lines 8-12 from:
* [[Digital Clock Manager]] - Create clocks with custom speeds between 2Mhz and 250Mhz.
to:
* [[Digital Clock Manager]] - Create clocks with custom speeds between 2Mhz and 250Mhz.
* [[Run BASCOM Basic Code]] - Run BASCOM code on the AVR8 soft processor.
* [[Working with Arduino Core]] - Make a simple change to the Arduino core in order to move a PWM pin with VHDL.
* [[Xilinx ISE Webpack Quick Start]] - Start learning VHDL with this Quick Start Guide for the Xilinx ISE Webpack software.
*
Changed lines 7-8 from:
* [[Infrared Quick Start]] - Get started with a sketch to decode IR commands.
to:
* [[Infrared Quick Start]] - Get started with a sketch to decode IR commands.
* [[Digital Clock Manager]] - Create clocks with custom speeds between 2Mhz and 250Mhz
.
Changed lines 5-6 from:
* [[Decode Remote Controls]] - Decode the IR data sent by an infrared remote control.
* [[Run Arduino Sketches]] - See how to run sketches and move the Arduino core SPI pins on
the fly.
to:
* [[Analyze Remote Control Commands]] - Analyze the IR data sent by an infrared remote control using the "Sump" Logic Analyzer.
* [[Run Arduino Sketches]] - See how to run sketches and move
the Arduino core SPI pins on the fly.
* [[Infrared Quick Start]] - Get started with a sketch to decode IR commands
.
Added line 6:
* [[Run Arduino Sketches]] - See how to run sketches and move the Arduino core SPI pins on the fly.
Changed line 2 from:
!!Screencast Tutorials
to:
!!Papilio Tutorials
Changed line 5 from:
!! Examples
to:
* [[Decode Remote Controls]] - Decode the IR data sent by an infrared remote control.
Changed lines 3-4 from:
* [[Debug Internal FPGA Logic]]
to:
* [[Debug Internal FPGA Logic]] - Learn how to debug digital logic running inside of the Papilio's FPGA.
* [[High Speed UART]] - Use a Xilinx reference design to implement high speed (3Mb/s) serial communications.
Added lines 1-3:
!Learning
!!Screencast Tutorials
* [[Debug Internal FPGA Logic]]
Added line 1:
!! Examples
  

Share |